AC
9 / 20
C++17
08/01/2026
AC
9 / 20
C++17
08/01/2026
TLE
0 / 600
C++17
03/01/2026
WA
0 / 600
C++17
03/01/2026
TLE
0 / 600
C++17
03/01/2026
WA
0 / 10
Output
01/01/2026
WA
0 / 600
Output
01/01/2026
TLE
0 / 600
C++17
01/01/2026
TLE
30 / 600
C++17
01/01/2026
AC
50 / 50
C++17
01/01/2026
WA
0 / 100
C++17
01/01/2026
WA
0 / 100
C++17
01/01/2026
AC
700 / 700
C++17
01/01/2026
WA
0 / 100
C++17
01/01/2026
WA
0 / 100
C++17
01/01/2026
AC
14 / 14
C++17
01/01/2026
AC
14 / 14
C++17
01/01/2026
AC
14 / 14
C++17
01/01/2026
AC
14 / 14
C++17
01/01/2026
AC
14 / 14
C++17
01/01/2026
WA
0 / 100
C++17
01/01/2026
TLE
0 / 100
C++17
01/01/2026
TLE
0 / 100
C++17
01/01/2026
WA
0 / 100
C++17
01/01/2026
TLE
0 / 100
C++17
01/01/2026
AC
9 / 20
C++17
01/01/2026
AC
13 / 13
C++17
01/01/2026
AC
13 / 13
C++17
01/01/2026
TLE
7 / 100
C++17
01/01/2026
TLE
8 / 100
C++17
01/01/2026
WA
8 / 100
C++17
01/01/2026
TLE
56 / 100
C++17
01/01/2026
TLE
40 / 50
C++17
01/01/2026
AC
4 / 20
C++17
01/01/2026
AC
5 / 20
C++17
01/01/2026
AC
6 / 20
C++17
01/01/2026
AC
9 / 20
C++17
01/01/2026
AC
5 / 20
C++17
01/01/2026
AC
5 / 20
C++17
01/01/2026
WA
0 / 20
C++17
01/01/2026
AC
4 / 20
C++17
01/01/2026
AC
20 / 20
C++17
01/01/2026
AC
20 / 20
C++17
01/01/2026